? semiconductor components industries, llc, 2010 february, 2010 ? rev. 1 1 publication order number: mc74hc377a/d mc74hc377a octal d flip-flop with common clock and enable high ? performance silicon ? gate cmos the mc74hc377a is identical in pinout to the ls273. the device inputs are compatible with standard cmos outputs; with pullup resistors, they are compatible with lsttl outputs. this device consists of eight d flip ? flops with common clock and enable (e ) inputs. each flip ? flop is loaded with a low ? to ? high transition of the clock input. enable (e ) is active low. features ? output drive capability: 10 lsttl loads ? outputs directly interface to cmos, nmos and ttl ? operating voltage range: 2.0 to 6.0 v ? low input current: 1.0 a ? high noise immunity characteristic of cmos devices ? in compliance with the requirements defined by jedec standard no. 7a ? chip complexity: 264 fets or 66 equivalent gates ? these are pb ? free devices http://onsemi.com 1 20 marking diagrams soic ? 20 dw suffix case 751d hc377a awlyywwg hc 377a alyw tssop ? 20 dt suffix case 948e 1 1 20 1 20 20 see detailed ordering and shipping information in the package dimensions sect ion on page 2 of this data sheet. ordering information a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g = pb ? free package = pb ? free package (note: microdot may be in either location) pin assignment q2 d1 d0 q0 e gnd q3 d3 d2 q1 5 4 3 2 1 10 9 8 7 6 14 15 16 17 18 19 20 11 12 13 q6 d6 d7 q7 v cc clock q4 d4 d5 q5
mc74hc377a http://onsemi.com 2 figure 1. logic diagram data inputs d0 11 clock d1 d2 d3 d4 d5 d6 d7 18 17 14 13 8 7 4 3 1 e 19 q0 q1 q2 q3 q4 q5 q6 q7 16 15 12 9 6 5 2 pin 20 = v cc pin 10 = gnd noninverting outputs ???????????????? ???????????????? function table ?????? ?????? ?????? ?????? ???????? ???????? ???????? ???? ???? ???? ??? ??? ???? ???? ??? ??? ???? ???? ?????? ?????? load ?1? ??? ??? ???? ???? l ??? ??? ???? ???? ?????? ?????? ?????? ??? ??? ??? ???? ???? ???? l ??? ??? ??? ???? ???? ???? ?????? ?????? ??? ??? x ???? ???? ??? ??? ???? ???? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ???????????????? ? to ? high cp transition l = low voltage level l = low voltage level one setup time prior to the low ? to ? high cp transition = low ? to ? high cp transition x = don?t care ?????????? ?????????? design criteria ????? ????? ??? ??? ?????????? ?????????? internal gate count* ????? ????? ??? ??? ?????????? ?????????? ?????????? ????? ????? ????? ??? ??? ??? ?????????? ?????????? ????? ????? ??? ??? w ?????????? ?????????? ????? ????? ??? ??? ???????????????? ???????????????? ? input nand gate. ordering information device package shipping ? mc74hc377adwg soic ? 20 wide (pb ? free) 38 units / rail mc74hc377adwr2g soic ? 20 wide (pb ? free) 1000 tape & reel mc74hc377adtg tssop ? 20* 75 units / rail MC74HC377ADTR2G tssop ? 20* 2500 tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *this package is inherently pb ? free.
mc74hc377a http://onsemi.com 3 ??????????????????????? ??????????????????????? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? v cc ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 20 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 25 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 50 ??? ??? ???? ???? ???? ?????????????? ?????????????? ?????????????? ????? ????? ????? ??? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended oper ating conditions may affect device reliability. ?derating ? soic package: ? 7 mw/ c from 65 to 125 c tssop package: ? 6.1 mw/ c from 65 to 125 c recommended operating conditions ???? ???? ?????????????? ?????????????? ?? ?? ???? ???? ??? ??? ???? ???? v cc ?????????????? ?????????????? ?? ?? ???? ???? ??? ??? ???? ???? ?????????????? ?????????????? ?? ?? ???? ???? ??? ??? ???? ???? ?????????????? ?????????????? ?? ?? ???? ???? ??? ??? c ???? ???? ???? ???? ?????????????? ?????????????? ?????????????? ?????????????? ?? ?? ?? ?? ???? ???? ???? ???? ??? ??? ??? ??? ? impedance cir- cuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
mc74hc377a http://onsemi.com 4 dc electrical characteristics (voltages referenced to gnd) ???? ???? ???? ???? symbol ?????????? ?????????? ?????????? ?????????? ????????? ????????? ????????? ????????? ??? ??? ??? ??? ?????????? ?????????? ?? ?? ?? ?? ???? ???? ???? c ???? ???? ???? 85 c ???? ???? ???? 125 c ???? ???? ???? ???? v ih ?????????? ?????????? ?????????? ?????????? ? level input voltage ????????? ????????? ????????? ????????? 20 a ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? ???? ???? ???? ???? ?????????? ?????????? ?????????? ?????????? ? level input voltage ????????? ????????? ????????? ????????? 20 a ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? ???? ???? ???? ???? ???? ?????????? ?????????? ?????????? ?????????? ?????????? ? level output voltage ????????? ????????? ????????? 20 a ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? ?? ????????? ????????? ????????? 4.0 ma |i out | 5.2 ma ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?????????? ?????????? ?????????? ?????????? ?????????? ? level output voltage ????????? ????????? ????????? 20 a ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? ?? ????????? ????????? ????????? 4.0 ma |i out | 5.2 ma ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?????????? ?????????? ????????? ????????? ??? ??? ???? ???? 0.1 ???? ???? 1.0 ???? ???? 1.0 ?? ?? a ???? ???? ?????????? ?????????? ????????? ????????? a ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? a
mc74hc377a http://onsemi.com 5 ac electrical characteristics (c l = 50 pf, input t r , t f = 6.0 ns) symbol parameter test conditions v cc (v) guaranteed limits unit ? 55 c to 25 85 c 125 c t phl , t plh maximum propagation delay clock to qn figures 2, 4 2.0 160 200 240 ns 4.5 32 40 48 6.0 27 34 41 t thl , t tlh maximum output transition time figures 2, 4 2.0 75 95 110 ns 4.5 15 19 22 6.0 13 16 19 t w minimum clock pulse width high or low figure 2 2.0 80 100 120 ns 4.5 16 20 24 6.0 4 17 20 t su minimum set ? up time d n to clock figure 3 2.0 60 75 90 ns 4.5 12 15 18 6.0 10 13 15 t su minimum set ? up time enable to clock figure 3 2.0 60 75 90 ns 4.5 12 15 18 6.0 10 13 15 t h minimum hold time d n to clock figure 3 2.0 3 3 3 ns 4.5 3 3 3 6.0 3 3 3 t h minimum hold time enable to clock figure 3 2.0 4 4 4 ns 4.5 4 4 4 6.0 4 4 4 f max maximum clock pulse frequency (50% duty cycle) figures 2, 4 2.0 6 5 4 ns 4.5 30 24 20 6.0 35 28 24 c in maximum input capacitance ? 10 10 10 pf c pd (note 1) typical @ 25 c, v cc = 5.0 v pf power dissipation capacitance 35 1. c pd is defined as the value of the ic?s equivalent capacitance from which the operating current can be calculated from: i cc (operating) c pd x v cc x f in x n sw where n sw = total number of outputs switching and f in = switching frequency.
mc74hc377a http://onsemi.com 6 switching waveforms figure 2. clock q t r t f v cc gnd 90% 50% 10% 90% 50% 10% t plh t phl t tlh t thl 50% data clock v cc t su gnd *includes all probe and jig capacitance c l * test point device under test output figure 3. t w 1/f max v cc gnd t su t h 50% figure 4. test circuit figure 5. expanded logic diagram c d q d0 3 2 q 0 c d q d1 4 5 q 1 c d q d2 7 6 q 2 c d q d3 8 9 q 3 c d q d4 13 12 q 4 c d q d5 14 15 q 5 c d q d6 17 16 q 6 c d q d7 18 19 q 7 11 1 data inputs noninverting outputs t h 50% 50% e clock e
mc74hc377a http://onsemi.com 7 package dimensions soic ? 20 dw suffix case 751d ? 05 issue g 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition.
mc74hc377a http://onsemi.com 8 package dimensions tssop ? 20 dt suffix case 948e ? 02 issue c dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1.dimensioning and tolerancing per ansi y14.5m, 1982. 2.controlling dimension: millimeter. 3.dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4.dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5.dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6.terminal numbers are shown for reference only. 7.dimension a and b are to be determined at datum plane ? w ? . 110 11 20 pin 1 ident a b ? t ? 0.100 (0.004) c d g h section n ? n k k1 jj1 n n m f ? w ? seating plane ? v ? ? u ? s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 --- --- s u 0.15 (0.006) t 7.06 16x 0.36 16x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc74hc377a http://onsemi.com 9 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. mc74hc377a/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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